This invention relates, in general, to semiconductor devices, and more particularly to the fabrication of semiconductor devices having laterally isolated semiconductor regions.
Presently, a number of lateral isolation schemes of semiconductor regions are known in the art. However, there are typically problems with the existing schemes. For example, one such scheme employs a nitride mask having a window therein through which the semiconductor regions, commonly polysilicon, are oxidized. Major problems with using this method include a resulting non-planar device structure, a non-vertical polysilicon sidewall and the polysilicon dimensions vary considerably due to the variability in oxide encroachment.
In their paper entitled "Planarized Self-Aligned Double-Polysilicon Bipolar Technology", IEEE 1988 Bipolar Circuits and Technology Meeting, Appendix III, Paper 6.1, Drobny et al. teach a SWAMI modification of polysilicon oxidation through a nitride window. A nitride sidewall spacer reduces oxide encroachment. However, the final planarity of the resulting structure after oxidation is dependent upon etching through half of the polysilicon prior to nitride sidewall deposition and polysilicon oxidation. This is extremely difficult because the problem of controlling the etch so that it stops halfway through the deposited polysilicon thickness hinders reproducibility and manufacturability. Additionally, the sidewalls taught by this method are not sealed.
U.S. Pat. No. 4,659,428 entitled "Method of Manufacturing a Semiconductor Device and Semiconductor Device Manufactured by Means of the Method" issued to Maas et al. on Apr. 21, 1987 discloses another approach. In this patent, silicon feature separation is accomplished by a groove having a dimension which is determined by the differential oxidation rates of undoped and heavily doped polysilicon or silicon layers under low temperature, steam oxidation conditions. There is an absolute requirement for heavy doping of the polysilicon or monosilicon layer of interest. Differential oxidation (approximately a tenfold difference) between the heavily doped layer of interest and the undoped sacrificial polysilicon layer is the heart of the process concept.
The present invention discloses a method for the fabrication of a device having sealed, laterally isolated semiconductor regions which reduces or eliminates the problems disclosed above.